SEMICONDUCTOR DESIGN VLSI design styles and tools

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VLSI design style impacts the application of the chip, design cycle time, and cost of the project. The article explains different types of VLSI design types. As there are many VLSI design software available worldwide that are required at various stages, this article also lists a few software suites that offer hierarchical VLSI design capabilities from top to bottom.

What are VLSI design styles?

VLSI design styles are a set of different methodologies and approaches to design ICs. The design styles can be implemented either during the physical implementation of the design or in the field of the application. The article lists a few VLSI design styles below.

FPGA (Field Programmable Gate Array)

An FPGA contains an array of configurable logic blocks, input/output buffers, and programmable interconnects. There are thousands of logic gates in an FPGA that have programmable interconnects. The specialty of FPGA is the flexibility to customize and reconfigure the hardware multiple times after fabrication. This is because no physical manufacturing step is needed for FPGA customization. Hence, FPGA is a “field-programmable” IC.

The gates of MOS pass transistors are connected to the output terminals of RAM cells inside the FPGA structure. By programming the RAM cells and setting up configurable switches, an FPGA can be reprogrammed. In simple words, a hardware description language (HDL) can program, and a Boolean function can implement an FPGA VLSI design style as per the system requirements.

The advantages of FPGAs include clock frequencies up to 800 MHz, fast prototyping, fast development, customization, ease of reconfiguration, and turnaround time. Typically, a modern car contains 10-12 FPGAs.

Gate Array Design

Gate array design implementation requires two processes during the manufacturing process. After initial deep processing steps, the standard mask generates an array of uncommitted pMOS and nMOS transistors on the chip that can be customized. Secondly, there is a customization option in the process of metallization. As discussed in our article "Semiconductor circuit design: key chemical procedures", the process of embedding metal interconnects is an end procedure of the fabrication process. Programming custom metal masks can form basic logic gates in the chip.

A gate array design is a set of capabilities between a flexible FPGA and the reliability of fully custom designs. Unlike FPGAs, gate array design cannot be reconfigured after manufacturing. The customization option offers reprogrammability during the manufacturing process. Once the gate array design chip is manufactured, changes to hardware design are challenging. The advantages of gate array design are high chip utilization factor, chip speed, and short turnaround time.

Full Custom Design

In a fully custom-designed chip, each mask is designed separately and is unique. In simple words, each transistor and interconnect is designed and placed by the teams. A designer is able to design and place up to 10 transistors every day. A single-cell design is not stored in the library and is not used again. The benefit of choosing a fully custom design achieving optimal performance and control over the design.

However, it makes fully custom design costly and time-consuming. The drastic increase in design cycle time may exceed the lifetime technological window of the chip, require extensive designer time, and spoil the marketing budget. To overcome cost and time, fully custom designs for memory-based chips are designed once and reused repeatedly in multiple applications. Logic-based chips can use some portion of a fully custom design style and integrate it with other designs to form a hybrid design. New ASIC technologies are designed with a fully custom design.

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Standard Cell Design

A standard cell-based design, or poly-cell design, overcomes the limitations of high cost and design time for fully custom cell design. The standard-designed cell requires designers to develop a custom-masked cell. The difference between a standard cell-based design and a fully custom design is storage. While a fully custom design requires designing a new mask, a standard cell design develops and stores the mask in a library.

The standard pre-designed and pre-characterised library may contain logic gates like NAND, NOR, XOR, etc, along with inverters, adders, multipliers, flip-flops, and various other digital electronic components. The floor plan for standard cells places cells with a fixed height together to form a row. Several logic gates can be implemented multiple times in this design style. The logic cell has to be extracted from the library and placed in the row to interconnect with neighboring cells to attain a desirable area, speed, power, and cost.

Structured ASIC

An ASIC (Application Specific Integrated Circuit) performs in special applications rather than serving general purposes in electronic systems. For example, the 54XX family follows military applications and the 78XX is a series of voltage regulator ICs. An ASIC is only designed once. Throughout the years, sellers have kept on adding new features. A structured ASIC, on the other hand, is a hybrid between ASIC and FPGA.

The internal characteristics of a structured ASIC are similar to an FPGA. However, a structured ASIC is not field-programmable. Similar to a standard cell, a structured ASIC contains predefined cells in the library and is mask-programmable. The lower metal layers are pre-defined during fabrication and higher layers are reconfigurable for the design. Structured ASIC has the high performance of an ASIC and low cost and turnaround time like an FPGA.

VLSI Design Tools

VLSI design tools are needed to perform tasks such as design, specifications, synthesis, simulation, floor planning, layout, placement, routing, testing, power analysis, optimization, and many other steps. The VLSI design hierarchy from top to bottom, as discussed in the previous article VLSI: Very Large Scale Integration, requires multiple software.

VLSI design isn’t one person’s game but an engineering team’s combined effort. Each point in the design hierarchy requires multiple designers and software suites. Even at a single stage of algorithm design, a software suite is required to perform all the necessary functions. VLSI design software starts digital design from scratch and leads up to physical mask generation for fabrication. For example, software defining the target’s chip architecture is not capable of routing, logic cell placement, or floorplanning.

Moreover, VLSI design requires complex programming language- hardware description languages (HDL) like Verilog, SystemVerilog, and VHDL. There are many VLSI design tools in the market. Some companies tend to gain access to an entire suite of VLSI software from a single vendor. However, most companies use software from multiple vendors according to system requirements and project life cycles.

As there are N VLSI design software, the article discusses popular software suites from SaaS companies in semiconductor design and manufacturing.

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ANSYS

Ansys, Inc. is an American multinational company headquartered in Canonsburg, Pennsylvania. The company offers multiphysics software to product teams and engineers for design and finite element analysis. For VLSI design, Ansys tools offer high-speed software for the smallest transistor technologies like FinFET and GAA. The multiphysics software also involves thermal, electrothermal, and electromagnetic aspects of the design. Some of Ansys's software for VLSI design- semiconductors (SC) are RedHawk-SC, RedHawk-SC Electrothermal, Totem-SC, PathFinder, PowerArtist, VeloceRF, etc.

SYNOPSYS

Synopsys is an American company headquartered in Sunnyvale, California. For the last 37 years, Synopsys has been a consistent name in the semiconductor design and manufacturing industry. Synopsys offers many EDA tools including silicon design tools to develop efficient hardware. There is proprietary software from the company to manage the silicon chip life cycle. Some of the widely used tools from Synopsys are Design Compiler, Fusion Design Platform, Verification Continuum, Silicon Engineering Platform, and Silicon Lifecycle Management Platform.

Siemens EDA

Siemens is originally a German multi-industry company. The SaaS providing unit from the parent company owns EDA tools under Siemens Digital Industries Software based in America. In 2017, the popular software Mentor Graphics was acquired by Siemens and is now selling software tools under the name of Siemens EDA. Siemens EDA tools design, synthesize, verify, floor plan, and generate physical design masks for various modern ICs. Softwares include Aprisa for digital IC implementation, mPower for power integrity analysis, Oasys-RTL for Logic synthesis, Precision for FPGA synthesis, and PowerPro for power optimization.

Cadence

Cadence Design Systems is an American multinational company headquartered in San Jose, California. Cadence has a wide portfolio of EDA tools ranging from circuit simulation, PCB design, and hardware-level coding to VLSI design. Some software from Cadence are Genus Synthesis Solutions, Tempus Timing Solution for FinFET, Innovus Implementation System, Voltus IC Power Integrity Solution, Stratus, Virtuoso Layout Suite, Protium Enterprise Prototyping for SoC, and many more. Cadence Allegro is another popular tool to work with PCBs.

Keysight Technologies

Keysight Technologies is an American company headquartered in Santa Rosa, California. The company has been known for a long time to offer electronic test equipment and software. For VLSI design, Keysight Technologies tools offer software named PathWave Advanced Design System (ADS) for circuit design and simulation at the system level. The software performs high-speed digital design and tests for making efficient power converter designs, and RF components that are free of unnecessary parasitic capacities and mixed-signal barriers.

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